1. Technical Field
The present invention relates to debug systems, semiconductor integrated circuit devices, microcomputers, and electronic apparatus.
2. Related Arts
In recent years, there is increasing the demand for microcomputers which are built in electronic apparatus, such as game devices, automobile-navigation systems, printers, and personal digital assistants, and capable of realizing advanced information processing. Such a built-in type microcomputer is generally mounted in a user board called as a target system. Then, in order to support development of the software that operates this target system, a pin-saving debug tool (a software development tool for supporting), such as in-circuit emulator (ICE) is widely used.
Here, as such ICE, conventionally, ICE called a CPU replacement as shown in FIG. 16 has been mainstream. In this ICE for CPU replacement, a microcomputer 302 is removed from a target system 300 at the time of debugging, and coupled to a probe 306 of a debug tool 304 instead. Then, this debug tool 304 emulates the operation of the removed microcomputer 302. Moreover, this debug tool 304 carries out various processing required for debugging.
However, this ICE for CPU replacement has a drawback that the count of lines 308 of the probe 306 increases as the pin count of the probe 306 increases. For this reason, it is difficult to emulate high-frequency operation of the microcomputer 302 (e.g., limited to around 33 MHz). Moreover, the design of the target system 300 also becomes difficult. Furthermore, the operation environment (timings and load conditions of the signal) of the target system 300 varies between at the time of actual operation in which the microcomputer 302 is mounted and operated, and at the time of a debug mode in which the operation of the microcomputer 302 is emulated with the debug tool 304. Moreover, the ICE for CPU replacement also has a problem that differently designed debug tools and probes with different pin counts and different pin positions need to be used for different microcomputers, even if they are the derivative products.
On the other hand, in order to resolve such drawbacks of the ICE for CPU replacement, there is known other ICE in which the debug pins and functions for realizing the same function as that of the ICE are mounted on a mass-production chip. For example, as such ICE for mounting a debug function, there is known microcomputers that incorporate an inner debug module, the inner debug module carrying out clock synchronous communication with the pin-saving debug tool (ICE or the like) and having an on-chip debug function to carry out debug commands inputted from the debug tool.
In such a case, the microcomputer carries out debugging through clock synchronous communication with the debug tool.
In this case, between a debug tool and a microcomputer, there are required: a break input from the debug tool to the microcomputer; a break/run state output from the microcomputer to the debug tool; data (debug commands, or the like) communication to the microcomputer from the debug tool; data communication from the microcomputer to the debug tool; a communication synchronous clock between the input debug tool and the microcomputer; a plurality of communication pins for additional information, such as a trace to the debug tool from the microcomputer; and terminals (pins), such as a ground line between the input debug tool and the microcomputer.
JP-A-8-255096 is a first example of related art. JP-A-11-282719 is a second example of related art.
Although the debug terminals (pins) rapidly increase as summing up such terminals (pins), it is preferable that terminals required only at the time of debugging and unneeded for end users be as less as possible. Moreover, the increase of the terminal (pin) count of the microcomputer PKG will lead to the cost increase or the like of ICs.
Furthermore, when the pin count between the board and debug tool will increase, designing of the board increasingly difficult, thereby reducing the reliability and causing the increase of the development cost of the board and system and the increase of the development time.